Vertically-integrated VLSI Information Processing


Vertically-integrated VLSI Information Processing

VVIP Lab Opening

VVIP Lab is looking for highly-motivated students for Ph.D and master program in 2021 summer and 2021 Fall quarters internally in UCSD. We recommend an internship or ECE299, a research course, to explore your research interest and fit at the beginning. (If you want to explore this area in general without research activity, I recommend taking "ECE284: Low-power VLSI Implementation for Machine Learning".)

Currently, we have multiple exciting research topics (3 digital hardware, 3 mixed-signal hardware, and 2 algorithm co-optimization projects, but all the research topics are somewhat inter-disciplinary). 

We are looking for passionate and strong researchers who can lead the project and write an academic literature independently rather than helping trivial labor-intensive tasks.  

For three research pillars listed below, the required skillsets as an ideal candidate are described below:

1. Digital machine learning accelerator architecture:

  - Verilog/VHDL, synthesis/auto-PnR with Cadence tools

2. Mixed-signal circuit for low-power AI hardware:

  - Full custom transistor-level circuit design, silicon tape-out experience highly welcomed

3. Algorithm hardware co-optimization in machine learning system:

  - Pytorch/tensor flow, familiar with machine learning network models for inference/training


Again, rather than any specific skillset listed above, we are looking for highly-motivated and passionate students. We can provide relevant training for your missing skillsets.

For any further questions and discussion, you can email me: m7kang@ucsd.edu 

- State which pillar (out of three pillars listed above) you are interested in.

- Attach your updated CV and transcript (optional) 


UCSD Electrical and Computer Engineering (ECE) Department