Vertically-integrated VLSI Information Processing


Vertically-integrated VLSI Information Processing

VVIP Lab Opening

VVIP Lab is looking for highly-motivated students for Ph.D program starting from 2022 Fall quarter. 

If you consider VVIP lab seriously, please apply "Computer Engineering" program inside ECE deparment. Otherwise, I have limited accessibility to your application.

For three research pillars listed below, the required skillsets as an ideal candidate are described below:

1. Mixed-signal circuit for low-power AI hardware:

  - Full custom transistor-level circuit design, silicon tape-out experience highly welcomed

2. Digital machine learning accelerator architecture:

  - Verilog/VHDL, synthesis/auto-PnR with Cadence tools

3. Algorithm hardware co-optimization in machine learning system:

 - Pytorch/tensor flow, familiar with machine learning network models for inference/training

For any further questions and discussion, you can email me: m7kang@ucsd.edu 

- State which pillar (out of three pillars listed above) you are interested in.

- Attach your updated CV and transcript (optional) 

- I appologize that I might not be able to reply due to high volume of emails. But, I am checking emails slowly, and keeping track of potential applicants with great fit.


UCSD Electrical and Computer Engineering (ECE) Department